// +build f030x8

// Peripheral: GPIO_Periph  General Purpose I/O.
// Instances:
//  GPIOA  mmap.GPIOA_BASE
//  GPIOB  mmap.GPIOB_BASE
//  GPIOC  mmap.GPIOC_BASE
//  GPIOD  mmap.GPIOD_BASE
//  GPIOF  mmap.GPIOF_BASE
// Registers:
//  0x00 32  MODER   Port mode register.
//  0x04 32  OTYPER  Port output type register.
//  0x08 32  OSPEEDR Port output speed register.
//  0x0C 32  PUPDR   Port pull-up/pull-down register.
//  0x10 32  IDR     Port input data register.
//  0x14 32  ODR     Port output data register.
//  0x18 32  BSRR    Port bit set/reset register.
//  0x1C 32  LCKR    Port configuration lock register.
//  0x20 32  AFR[2]  Alternate function low register.
//  0x28 32  BRR     Bit reset register.
// Import:
//  stm32/o/f030x8/mmap
package gpio

// DO NOT EDIT THIS FILE. GENERATED BY stm32xgen.

const (
	MODER0  MODER = 0x03 << 0  //+
	MODER1  MODER = 0x03 << 2  //+
	MODER2  MODER = 0x03 << 4  //+
	MODER3  MODER = 0x03 << 6  //+
	MODER4  MODER = 0x03 << 8  //+
	MODER5  MODER = 0x03 << 10 //+
	MODER6  MODER = 0x03 << 12 //+
	MODER7  MODER = 0x03 << 14 //+
	MODER8  MODER = 0x03 << 16 //+
	MODER9  MODER = 0x03 << 18 //+
	MODER10 MODER = 0x03 << 20 //+
	MODER11 MODER = 0x03 << 22 //+
	MODER12 MODER = 0x03 << 24 //+
	MODER13 MODER = 0x03 << 26 //+
	MODER14 MODER = 0x03 << 28 //+
	MODER15 MODER = 0x03 << 30 //+
)

const (
	MODER0n  = 0
	MODER1n  = 2
	MODER2n  = 4
	MODER3n  = 6
	MODER4n  = 8
	MODER5n  = 10
	MODER6n  = 12
	MODER7n  = 14
	MODER8n  = 16
	MODER9n  = 18
	MODER10n = 20
	MODER11n = 22
	MODER12n = 24
	MODER13n = 26
	MODER14n = 28
	MODER15n = 30
)

const (
	OT_0  OTYPER = 0x01 << 0  //+
	OT_1  OTYPER = 0x01 << 1  //+
	OT_2  OTYPER = 0x01 << 2  //+
	OT_3  OTYPER = 0x01 << 3  //+
	OT_4  OTYPER = 0x01 << 4  //+
	OT_5  OTYPER = 0x01 << 5  //+
	OT_6  OTYPER = 0x01 << 6  //+
	OT_7  OTYPER = 0x01 << 7  //+
	OT_8  OTYPER = 0x01 << 8  //+
	OT_9  OTYPER = 0x01 << 9  //+
	OT_10 OTYPER = 0x01 << 10 //+
	OT_11 OTYPER = 0x01 << 11 //+
	OT_12 OTYPER = 0x01 << 12 //+
	OT_13 OTYPER = 0x01 << 13 //+
	OT_14 OTYPER = 0x01 << 14 //+
	OT_15 OTYPER = 0x01 << 15 //+
)

const (
	OT_0n  = 0
	OT_1n  = 1
	OT_2n  = 2
	OT_3n  = 3
	OT_4n  = 4
	OT_5n  = 5
	OT_6n  = 6
	OT_7n  = 7
	OT_8n  = 8
	OT_9n  = 9
	OT_10n = 10
	OT_11n = 11
	OT_12n = 12
	OT_13n = 13
	OT_14n = 14
	OT_15n = 15
)

const (
	OSPEEDR0  OSPEEDR = 0x03 << 0  //+
	OSPEEDR1  OSPEEDR = 0x03 << 2  //+
	OSPEEDR2  OSPEEDR = 0x03 << 4  //+
	OSPEEDR3  OSPEEDR = 0x03 << 6  //+
	OSPEEDR4  OSPEEDR = 0x03 << 8  //+
	OSPEEDR5  OSPEEDR = 0x03 << 10 //+
	OSPEEDR6  OSPEEDR = 0x03 << 12 //+
	OSPEEDR7  OSPEEDR = 0x03 << 14 //+
	OSPEEDR8  OSPEEDR = 0x03 << 16 //+
	OSPEEDR9  OSPEEDR = 0x03 << 18 //+
	OSPEEDR10 OSPEEDR = 0x03 << 20 //+
	OSPEEDR11 OSPEEDR = 0x03 << 22 //+
	OSPEEDR12 OSPEEDR = 0x03 << 24 //+
	OSPEEDR13 OSPEEDR = 0x03 << 26 //+
	OSPEEDR14 OSPEEDR = 0x03 << 28 //+
	OSPEEDR15 OSPEEDR = 0x03 << 30 //+
)

const (
	OSPEEDR0n  = 0
	OSPEEDR1n  = 2
	OSPEEDR2n  = 4
	OSPEEDR3n  = 6
	OSPEEDR4n  = 8
	OSPEEDR5n  = 10
	OSPEEDR6n  = 12
	OSPEEDR7n  = 14
	OSPEEDR8n  = 16
	OSPEEDR9n  = 18
	OSPEEDR10n = 20
	OSPEEDR11n = 22
	OSPEEDR12n = 24
	OSPEEDR13n = 26
	OSPEEDR14n = 28
	OSPEEDR15n = 30
)

const (
	PUPDR0  PUPDR = 0x03 << 0  //+
	PUPDR1  PUPDR = 0x03 << 2  //+
	PUPDR2  PUPDR = 0x03 << 4  //+
	PUPDR3  PUPDR = 0x03 << 6  //+
	PUPDR4  PUPDR = 0x03 << 8  //+
	PUPDR5  PUPDR = 0x03 << 10 //+
	PUPDR6  PUPDR = 0x03 << 12 //+
	PUPDR7  PUPDR = 0x03 << 14 //+
	PUPDR8  PUPDR = 0x03 << 16 //+
	PUPDR9  PUPDR = 0x03 << 18 //+
	PUPDR10 PUPDR = 0x03 << 20 //+
	PUPDR11 PUPDR = 0x03 << 22 //+
	PUPDR12 PUPDR = 0x03 << 24 //+
	PUPDR13 PUPDR = 0x03 << 26 //+
	PUPDR14 PUPDR = 0x03 << 28 //+
	PUPDR15 PUPDR = 0x03 << 30 //+
)

const (
	PUPDR0n  = 0
	PUPDR1n  = 2
	PUPDR2n  = 4
	PUPDR3n  = 6
	PUPDR4n  = 8
	PUPDR5n  = 10
	PUPDR6n  = 12
	PUPDR7n  = 14
	PUPDR8n  = 16
	PUPDR9n  = 18
	PUPDR10n = 20
	PUPDR11n = 22
	PUPDR12n = 24
	PUPDR13n = 26
	PUPDR14n = 28
	PUPDR15n = 30
)

const (
	V0  IDR = 0x01 << 0  //+
	V1  IDR = 0x01 << 1  //+
	V2  IDR = 0x01 << 2  //+
	V3  IDR = 0x01 << 3  //+
	V4  IDR = 0x01 << 4  //+
	V5  IDR = 0x01 << 5  //+
	V6  IDR = 0x01 << 6  //+
	V7  IDR = 0x01 << 7  //+
	V8  IDR = 0x01 << 8  //+
	V9  IDR = 0x01 << 9  //+
	V10 IDR = 0x01 << 10 //+
	V11 IDR = 0x01 << 11 //+
	V12 IDR = 0x01 << 12 //+
	V13 IDR = 0x01 << 13 //+
	V14 IDR = 0x01 << 14 //+
	V15 IDR = 0x01 << 15 //+
)

const (
	V0n  = 0
	V1n  = 1
	V2n  = 2
	V3n  = 3
	V4n  = 4
	V5n  = 5
	V6n  = 6
	V7n  = 7
	V8n  = 8
	V9n  = 9
	V10n = 10
	V11n = 11
	V12n = 12
	V13n = 13
	V14n = 14
	V15n = 15
)

const (
	V0  ODR = 0x01 << 0  //+
	V1  ODR = 0x01 << 1  //+
	V2  ODR = 0x01 << 2  //+
	V3  ODR = 0x01 << 3  //+
	V4  ODR = 0x01 << 4  //+
	V5  ODR = 0x01 << 5  //+
	V6  ODR = 0x01 << 6  //+
	V7  ODR = 0x01 << 7  //+
	V8  ODR = 0x01 << 8  //+
	V9  ODR = 0x01 << 9  //+
	V10 ODR = 0x01 << 10 //+
	V11 ODR = 0x01 << 11 //+
	V12 ODR = 0x01 << 12 //+
	V13 ODR = 0x01 << 13 //+
	V14 ODR = 0x01 << 14 //+
	V15 ODR = 0x01 << 15 //+
)

const (
	V0n  = 0
	V1n  = 1
	V2n  = 2
	V3n  = 3
	V4n  = 4
	V5n  = 5
	V6n  = 6
	V7n  = 7
	V8n  = 8
	V9n  = 9
	V10n = 10
	V11n = 11
	V12n = 12
	V13n = 13
	V14n = 14
	V15n = 15
)

const (
	BS_0  BSRR = 0x01 << 0  //+
	BS_1  BSRR = 0x01 << 1  //+
	BS_2  BSRR = 0x01 << 2  //+
	BS_3  BSRR = 0x01 << 3  //+
	BS_4  BSRR = 0x01 << 4  //+
	BS_5  BSRR = 0x01 << 5  //+
	BS_6  BSRR = 0x01 << 6  //+
	BS_7  BSRR = 0x01 << 7  //+
	BS_8  BSRR = 0x01 << 8  //+
	BS_9  BSRR = 0x01 << 9  //+
	BS_10 BSRR = 0x01 << 10 //+
	BS_11 BSRR = 0x01 << 11 //+
	BS_12 BSRR = 0x01 << 12 //+
	BS_13 BSRR = 0x01 << 13 //+
	BS_14 BSRR = 0x01 << 14 //+
	BS_15 BSRR = 0x01 << 15 //+
	BR_0  BSRR = 0x01 << 16 //+
	BR_1  BSRR = 0x01 << 17 //+
	BR_2  BSRR = 0x01 << 18 //+
	BR_3  BSRR = 0x01 << 19 //+
	BR_4  BSRR = 0x01 << 20 //+
	BR_5  BSRR = 0x01 << 21 //+
	BR_6  BSRR = 0x01 << 22 //+
	BR_7  BSRR = 0x01 << 23 //+
	BR_8  BSRR = 0x01 << 24 //+
	BR_9  BSRR = 0x01 << 25 //+
	BR_10 BSRR = 0x01 << 26 //+
	BR_11 BSRR = 0x01 << 27 //+
	BR_12 BSRR = 0x01 << 28 //+
	BR_13 BSRR = 0x01 << 29 //+
	BR_14 BSRR = 0x01 << 30 //+
	BR_15 BSRR = 0x01 << 31 //+
)

const (
	BS_0n  = 0
	BS_1n  = 1
	BS_2n  = 2
	BS_3n  = 3
	BS_4n  = 4
	BS_5n  = 5
	BS_6n  = 6
	BS_7n  = 7
	BS_8n  = 8
	BS_9n  = 9
	BS_10n = 10
	BS_11n = 11
	BS_12n = 12
	BS_13n = 13
	BS_14n = 14
	BS_15n = 15
	BR_0n  = 16
	BR_1n  = 17
	BR_2n  = 18
	BR_3n  = 19
	BR_4n  = 20
	BR_5n  = 21
	BR_6n  = 22
	BR_7n  = 23
	BR_8n  = 24
	BR_9n  = 25
	BR_10n = 26
	BR_11n = 27
	BR_12n = 28
	BR_13n = 29
	BR_14n = 30
	BR_15n = 31
)

const (
	LCK0  LCKR = 0x01 << 0  //+
	LCK1  LCKR = 0x01 << 1  //+
	LCK2  LCKR = 0x01 << 2  //+
	LCK3  LCKR = 0x01 << 3  //+
	LCK4  LCKR = 0x01 << 4  //+
	LCK5  LCKR = 0x01 << 5  //+
	LCK6  LCKR = 0x01 << 6  //+
	LCK7  LCKR = 0x01 << 7  //+
	LCK8  LCKR = 0x01 << 8  //+
	LCK9  LCKR = 0x01 << 9  //+
	LCK10 LCKR = 0x01 << 10 //+
	LCK11 LCKR = 0x01 << 11 //+
	LCK12 LCKR = 0x01 << 12 //+
	LCK13 LCKR = 0x01 << 13 //+
	LCK14 LCKR = 0x01 << 14 //+
	LCK15 LCKR = 0x01 << 15 //+
	LCKK  LCKR = 0x01 << 16 //+
)

const (
	LCK0n  = 0
	LCK1n  = 1
	LCK2n  = 2
	LCK3n  = 3
	LCK4n  = 4
	LCK5n  = 5
	LCK6n  = 6
	LCK7n  = 7
	LCK8n  = 8
	LCK9n  = 9
	LCK10n = 10
	LCK11n = 11
	LCK12n = 12
	LCK13n = 13
	LCK14n = 14
	LCK15n = 15
	LCKKn  = 16
)

const (
	BR_0  BRR = 0x01 << 0  //+
	BR_1  BRR = 0x01 << 1  //+
	BR_2  BRR = 0x01 << 2  //+
	BR_3  BRR = 0x01 << 3  //+
	BR_4  BRR = 0x01 << 4  //+
	BR_5  BRR = 0x01 << 5  //+
	BR_6  BRR = 0x01 << 6  //+
	BR_7  BRR = 0x01 << 7  //+
	BR_8  BRR = 0x01 << 8  //+
	BR_9  BRR = 0x01 << 9  //+
	BR_10 BRR = 0x01 << 10 //+
	BR_11 BRR = 0x01 << 11 //+
	BR_12 BRR = 0x01 << 12 //+
	BR_13 BRR = 0x01 << 13 //+
	BR_14 BRR = 0x01 << 14 //+
	BR_15 BRR = 0x01 << 15 //+
)

const (
	BR_0n  = 0
	BR_1n  = 1
	BR_2n  = 2
	BR_3n  = 3
	BR_4n  = 4
	BR_5n  = 5
	BR_6n  = 6
	BR_7n  = 7
	BR_8n  = 8
	BR_9n  = 9
	BR_10n = 10
	BR_11n = 11
	BR_12n = 12
	BR_13n = 13
	BR_14n = 14
	BR_15n = 15
)
